Whether you program in C/C++, Progress, VHDL, Fortran, Matlab, Java, PHP, Perl or one of the many other languages ED supports you'll quickly be impressed by its capabilities. ED's intelligent editing features help you to write code by completing keywords ...
Size: 5.6 MB, Price: USD $169.00 , License: Commercial, Author: Soft As It Gets Pty Ltd (getsoft.com)
If you want to integrate the generated models with other applications GeneXproTools lets you translate them to up to sixteen different programming languages, from mainstream languages such as Java and c# to specialized languages like Matlab and VHDL.
Features : Verilog simulator and debugger, supporting full IEEE 1364-2001 Verify behavioral and RTL models with functional simulation Verify pre/post-layout gate-level netlist with SDF back-annotation timing simulation Debug and trace simulation signals with user-friendly waveform viewer Create Verilog, SystemVerilog, VHDL, and SystemC source ...
Operator formats are supported for a variety of languages including: ABEL, C, C++, PALASM, Verilog, VB and VHDL. The Boolean minimizer uses a Karnaugh map approach, also known as a Veitch diagram.